The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor devices and structure.
In the past, the semiconductor industry utilized various methods and structures to form semiconductor devices that utilized trenches that were lined with an insulator such as silicon dioxide. These lined trenches had various applications such as forming the gate insulator for metal oxide semiconductor (MOS) field effect transistors (FETs). One particular application was for forming the gate of power MOS transistors. Such MOS transistors were sometimes referred to as trench FETs or TFETs.
One method of forming the lined trenches used two different process steps to form the insulator. Silicon dioxide or oxide was formed on the bottom portion of the trench and subsequently an oxide was formed along the sidewalls of the trench. Forming the sidewall oxide subsequent to the bottom oxide exposed the critical trench sidewall to multiple process steps while forming the bottom oxide and caused increased stress at the sidewall to bottom oxide interface. The increased stress often caused sidewall oxide thinning at the interface.
Another method of forming the lined trenches simultaneously formed a thick oxide in the bottom of the trench and the top of the trench around the trench opening. The oxide near the trench opening was referred to as a corner oxide. An example of such a lined trench is disclosed in a publication entitled “Trench Power MOSFET Having Low Gate Charge”, published article, website IP.com, IPCOM000021950D, Feb. 17, 2004. The thick oxide at the top of the trench narrowed the opening at the top of the trench and often made it difficult to form a conductive material within the trench. The oxide growth at the top of the trench also limited the thickness of the oxide that could be formed at the bottom of the trench.
Accordingly, it is desirable to have a lined trench and method that facilitates forming a thick oxide in the bottom of the trench, that protects sidewalls of the trench during subsequent processing steps, that reduces stress in the resulting device, that does not impede filling of the trench with conductive material, and that does not limit the thickness of the oxide in the bottom of the trench.
For simplicity and clarity of illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. Although the devices may be explained herein as certain N-channel or P-Channel devices, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions are generally not straight lines and the corners are not precise angles.